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/*#######################################################################################
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Decodieren eines RC Summen Signals
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#######################################################################################*/
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// + Copyright (c) 04.2007 Holger Buss
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// + only for non-profit use
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// + www.MikroKopter.com
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// + see the File "License.txt" for further Informations
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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#include <stdlib.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include "rc.h"
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#include "main.h"
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volatile int16_t PPM_in[15]; //PPM24 supports 12 channels per frame
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volatile int16_t PPM_diff[15];
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volatile uint8_t NewPpmData = 1;
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volatile int16_t RC_Quality = 0;
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/***************************************************************/
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/*  16bit timer 1 is used to decode the PPM-Signal            */
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/***************************************************************/
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void RC_Init (void)
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{
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        uint8_t sreg = SREG;
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        // disable all interrupts before reconfiguration
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        cli();
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        // PPM-signal is connected to the Input Capture Pin (PD6) of timer 1
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        DDRD &= ~(1<<DDD6);
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        PORTD |= (1<<PORTD6);
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        // Channel 5,6,7 is decoded to servo signals at pin PD5 (J3), PD4(J4), PD3(J5)
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        // set as output
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        DDRD |= (1<<DDD5)|(1<<DDD4);
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        // low level
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        PORTD &= ~((1<<PORTD5)|(1<<PORTD4));
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        // PD3 can't be used in FC 1.1 if 2nd UART is activated
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        // because TXD1 is at that port
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        if(BoardRelease == 10)
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        {
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                DDRD |= (1<<PORTD3);
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                PORTD &= ~(1<<PORTD3);
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        }
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        // Timer/Counter1 Control Register A, B, C
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        // Normal Mode (bits: WGM13=0, WGM12=0, WGM11=0, WGM10=0)
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        // Compare output pin A & B is disabled (bits: COM1A1=0, COM1A0=0, COM1B1=0, COM1B0=0)
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        // Set clock source to SYSCLK/64 (bit: CS12=0, CS11=1, CS10=1)
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        // Enable input capture noise cancler (bit: ICNC1=1)
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        // Trigger on positive edge of the input capture pin (bit: ICES1=1),
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        // Therefore the counter incremets at a clock of 20 MHz/64 = 312.5 kHz or 3.2µs
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    // The longest period is 0xFFFF / 312.5 kHz = 0.209712 s.
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        TCCR1A &= ~((1<<COM1A1)|(1<<COM1A0)|(1<<COM1B1)|(1<<COM1B0)|(1<<WGM11)|(1<<WGM10));
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        TCCR1B &= ~((1<<WGM13)|(1<<WGM12)|(1<<CS12));
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        TCCR1B |= (1<<CS11)|(1<<CS10)|(1<<ICES1)|(1<<ICNC1);
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        TCCR1C &= ~((1<<FOC1A)|(1<<FOC1B));
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        // Timer/Counter1 Interrupt Mask Register
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        // Enable Input Capture Interrupt (bit: ICIE1=1)
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        // Disable Output Compare A & B Match Interrupts (bit: OCIE1B=0, OICIE1A=0)
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        // Enable Overflow Interrupt (bit: TOIE1=0)
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        TIMSK1 &= ~((1<<OCIE1B)|(1<<OCIE1A));
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    TIMSK1 |= (1<<ICIE1)|(1<<TOIE1);
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    RC_Quality = 0;
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    SREG = sreg;
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}
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// happens every 0.209712 s.
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// check for at least one input capture event per timer overflow (timeout)
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ISR(TIMER1_OVF_vect)
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{
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        static uint16_t lastICR1 = 0;
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        // if ICR1 has not changed
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        // then no new input capture event has occured since last timer overflow
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        if (lastICR1 == ICR1) RC_Quality /= 2;
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        lastICR1 = ICR1; // store last ICR1
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}
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/********************************************************************/
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/*         Every time a positive edge is detected at PD6            */
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/********************************************************************/
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/*                               t-Frame
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       <----------------------------------------------------------------------->
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         ____   ______   _____   ________                ______    sync gap      ____
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        |    | |      | |     | |        |              |      |                |
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        |    | |      | |     | |        |              |      |                |
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     ___|    |_|      |_|     |_|        |_.............|      |________________|
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        <-----><-------><------><-------->              <------>                <---
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          t0       t1      t2       t4                     tn                     t0
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The PPM-Frame length is 22.5 ms.
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Channel high pulse width range is 0.7 ms to 1.7 ms completed by an 0.3 ms low pulse.
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The mininimum time delay of two events coding a channel is ( 0.7 + 0.3) ms = 1 ms.
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The maximum time delay of two events coding a chanel is ( 1.7 + 0.3) ms = 2 ms.
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The minimum duration of all channels at minimum value is  8 * 1 ms = 8 ms.
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The maximum duration of all channels at maximum value is  8 * 2 ms = 16 ms.
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The remaining time of (22.5 - 8 ms) ms = 14.5 ms  to (22.5 - 16 ms) ms = 6.5 ms is
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the syncronization gap.
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*/
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ISR(TIMER1_CAPT_vect) // typical rate of 1 ms to 2 ms
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{
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    int16_t signal = 0, tmp;
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        static int16_t index;
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        static uint16_t oldICR1 = 0;
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        // 16bit Input Capture Register ICR1 contains the timer value TCNT1
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        // at the time the edge was detected
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        // calculate the time delay to the previous event time which is stored in oldICR1
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        // calculatiing the difference of the two uint16_t and converting the result to an int16_t
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        // implicit handles a timer overflow 65535 -> 0 the right way.
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        signal = (uint16_t) ICR1 - oldICR1;
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        oldICR1 = ICR1;
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    //sync gap? (3.52 ms < signal < 25.6 ms)
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        if((signal > 1100) && (signal < 8000))
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        {
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                // if a sync gap happens and there where at least 4 channels decoded before
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                // then the NewPpmData flag is reset indicating valid data in the PPM_in[] array.
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                if(index >= 4)  NewPpmData = 0;  // Null means NewData for the first 4 channels
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                // synchronize channel index
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                index = 1;
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        }
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        else // within the PPM frame
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    {
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        if(index < 14) // PPM24 supports 12 channels
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        {
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                        // check for valid signal length (0.8 ms < signal < 2.1984 ms)
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                        // signal range is from 1.0ms/3.2us = 312 to 2.0ms/3.2us = 625
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            if((signal > 250) && (signal < 687))
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            {
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                                // shift signal to zero symmetric range  -154 to 159
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                signal -= 466; // offset of 1.4912 ms ??? (469 * 3.2µs = 1.5008 ms)
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                // check for stable signal
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                if(abs(signal-PPM_in[index]) < 6)
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                {
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                                        if(RC_Quality < 200) RC_Quality +=10;
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                                }
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                                // calculate exponential history for signal
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                tmp = (3 * (PPM_in[index]) + signal) / 4;
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                if(tmp > signal+1) tmp--; else
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                if(tmp < signal-1) tmp++;
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                // calculate signal difference on good signal level
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                if(RC_Quality >= 195)  PPM_diff[index] = ((tmp - PPM_in[index]) / 3) * 3; // cut off lower 3 bit for nois reduction
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                else PPM_diff[index] = 0;
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                PPM_in[index] = tmp; // update channel value
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            }
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            index++; // next channel
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            // demux sum signal for channels 5 to 7 to J3, J4, J5
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                if(index == 5) PORTD |= (1<<PORTD5); else PORTD &= ~(1<<PORTD5);
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                if(index == 6) PORTD |= (1<<PORTD4); else PORTD &= ~(1<<PORTD4);
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                if(BoardRelease == 10)
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                {
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                                if(index == 7) PORTD |= (1<<PORTD3); else PORTD &= ~(1<<PORTD3);
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                }
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        }
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        }
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        if(RC_Quality) RC_Quality--;
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}
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