Details | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
104 | ingob | 1 | /*------------------------------------------------------------------------------ |
2 | ** ** |
||
3 | ** Ident : main.h ** |
||
4 | ** Project : MX12 3 ppm channel expander ** |
||
5 | ** Author : J.Wanders ** |
||
6 | ** modified : 05.2008 Heinrich Fischer for use with WinAVR ** |
||
7 | ** ** |
||
8 | ** The use of this project (hardware, software, binary files, sources and ** |
||
9 | ** documentation) is only permittet for non-commercial use ** |
||
10 | ** (directly or indirectly) ** |
||
11 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"** |
||
12 | ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ** |
||
13 | ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ** |
||
14 | ** ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE ** |
||
15 | ** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ** |
||
16 | ** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ** |
||
17 | ** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ** |
||
18 | ** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ** |
||
19 | ** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ** |
||
20 | ** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ** |
||
21 | ** POSSIBILITY OF SUCH DAMAGE. ** |
||
22 | ** ** |
||
23 | **----------------------------------------------------------------------------*/ |
||
24 | |||
25 | #include <avr/io.h> |
||
26 | #include <inttypes.h> |
||
27 | |||
28 | /* CONSTANTS */ |
||
29 | #define TRUE 0xFF |
||
30 | #define FALSE 0x00 |
||
31 | |||
32 | #define CHANNEL_7_ADC PORTA1 // (pin12) |
||
33 | #define CHANNEL_8_ADC PORTA2 // (pin11) |
||
34 | #define CHANNEL_9_ADC PORTA3 // (pin11) |
||
35 | #define PPM_IN PORTA7 // (pin6) |
||
36 | #define PPM_OUT_PIN PORTB2 // (pin5) |
||
37 | |||
38 | #define ADC_CHANNEL_7 0x01 // ADC1 - PORTA1 (pin12) |
||
39 | #define ADC_CHANNEL_8 0x02 // ADC2 - PORTA2 (pin11) |
||
40 | #define ADC_CHANNEL_9 0x03 // ADC3 - PORTA3 (pin10) |
||
41 | #define ADC_CHANNEL_MASK 0x03 |
||
42 | |||
43 | |||
44 | #define START_PULSE_HIGH 400 // [0.4ms] |
||
45 | #define START_PULSE_LOW 600 // [0.6ms] |
||
46 | //#define FORCE_LOW_END_FRAME 2100 // [2.1ms] |
||
47 | //#define MIN_SYNC_TIME 2400 // [2.4ms] |
||
48 | //NEW definition in main.h |
||
49 | #define FORCE_LOW_END_FRAME 500 // [0,5ms] |
||
50 | #define MIN_SYNC_TIME 3000 // [3.0ms] |
||
51 | #define MAX_SYNC_TIME 22000 // total frame time - 8 x min channel frame time = 22ms - 8 x 1ms = 22 - 8 |
||
52 | |||
53 | |||
54 | // minimum channel frame = START_PULSE_HIGH + START_PULSE_LOW = 400 + 600 counts = 1000 counts = 1ms |
||
55 | // PPM frame length = 22ms = 22000 counts |
||
56 | |||
57 | /**** MACROS ******************************************************************/ |
||
58 | |||
59 | #define SET_PPM_OUT_HIGH PORTB |= (1<<PPM_OUT_PIN) |
||
60 | #define SET_PPM_OUT_LOW PORTB &= ~(1<<PPM_OUT_PIN) |
||
61 | |||
62 | #define FALLING_EDGE_TRIGGER TCCR1B &= ~(1<<ICES1) |
||
63 | #define RISING_EDGE_TRIGGER TCCR1B |= (1<<ICES1) |
||
64 | |||
65 | #define SET_COMPARE_COUNTER_TO_ZERO OCR1A = 0 |
||
66 | #define SET_COUNTER_TO_ZERO TCNT1 = 0 |
||
67 | #define SET_CAPTURE_COUNTER_TO_ZERO ICR1 = 0 |
||
68 | |||
69 | #define DISABLE_INPUT_CAPTURE TIMSK1 &= ~(1<<ICIE1) // disable input capture |
||
70 | #define ENABLE_INPUT_CAPTURE TIMSK1 |= (1 << ICIE1) // enable input capture |
||
71 | |||
72 | #define DISABLE_OUTPUT_COMPARE TIMSK1 &= ~(1<<OCIE1A) // disable Output Compare A Match Interrupt |
||
73 | #define ENABLE_OUTPUT_COMPARE TIMSK1 |= (1<<OCIE1A) // enable Output Compare A Match Interrupt |
||
74 | |||
75 | #define TRIGGER_INPUT_CAPTURE_INTERRUPT TIFR1 |= (1<<ICF1) // |
||
76 | #define CLEAR_INPUT_CAPTURE_INTERRUPT_FLAG TIFR1 &= ~(1<<ICF1) // reset ICF flag |
||
77 | |||
78 | #define TRIGGER_INPUT_COMPARE_INTERRUPT TIFR1 |= (1<<OCF1A) |
||
79 | |||
80 | #define SET_TIMER_TO_ICP_CTC TCCR1B |= (1<<WGM13) // CTC mode for ICP, prescaler 8 / 8MHz => [1.0us] |
||
81 | #define SET_TIMER_TO_COMPA_CTC TCCR1B &= ~(1<<WGM13) // CTC mode for COMPA, prescaler 8 / 8MHz => [1.0us] |
||
82 | |||
83 | // clear ADC enable & ADC Start Conversion & ADC Interrupt Enable bit |
||
84 | #define ADC_DISABLE ADCSRA &= ~((1<<ADEN)|(1<<ADSC)|(1<<ADIE)) |
||
85 | // set ADC enable & ADC Start Conversion & ADC Interrupt Enable bit |
||
86 | #define ADC_ENABLE ADCSRA |= (1<<ADEN)|(1<<ADSC)|(1<<ADIE) |
||
87 | |||
88 | |||
89 | /**** END MACROS *****************************************************************************/ |
||
90 | |||
91 | |||
92 | |||
93 | |||
94 | |||
95 | //#define cli() __disable_interrupt() |
||
96 | //#define sei() __enable_interrupt() |
||
97 | |||
98 | |||
99 | |||
100 | |||
101 |